create_clock -period 16.667 -name usb_clk_60m -waveform {0.000 8.334} [get_ports usb_clk_60m]

set_property -dict {PACKAGE_PIN N16 IOSTANDARD LVCMOS33} [get_ports rst_n]
set_property -dict {PACKAGE_PIN W15 IOSTANDARD LVCMOS33} [get_ports {usb_data[0]}]
set_property -dict {PACKAGE_PIN Y14 IOSTANDARD LVCMOS33} [get_ports {usb_data[1]}]
set_property -dict {PACKAGE_PIN W13 IOSTANDARD LVCMOS33} [get_ports {usb_data[2]}]
set_property -dict {PACKAGE_PIN U15 IOSTANDARD LVCMOS33} [get_ports {usb_data[3]}]
set_property -dict {PACKAGE_PIN U13 IOSTANDARD LVCMOS33} [get_ports {usb_data[4]}]
set_property -dict {PACKAGE_PIN P14 IOSTANDARD LVCMOS33} [get_ports {usb_data[5]}]
set_property -dict {PACKAGE_PIN T12 IOSTANDARD LVCMOS33} [get_ports {usb_data[6]}]
set_property -dict {PACKAGE_PIN u12 IOSTANDARD LVCMOS33} [get_ports {usb_data[7]}]
set_property -dict {PACKAGE_PIN V12 IOSTANDARD LVCMOS33} [get_ports usb_siwu_n]
set_property -dict {PACKAGE_PIN W14 IOSTANDARD LVCMOS33} [get_ports usb_clk_60m]
set_property -dict {PACKAGE_PIN V13 IOSTANDARD LVCMOS33} [get_ports usb_rd_n]
set_property -dict {PACKAGE_PIN U14 IOSTANDARD LVCMOS33} [get_ports usb_wr_n]
set_property -dict {PACKAGE_PIN T11 IOSTANDARD LVCMOS33} [get_ports usb_rxf_n]
set_property -dict {PACKAGE_PIN R14 IOSTANDARD LVCMOS33} [get_ports usb_txe_n]
set_property -dict {PACKAGE_PIN V15 IOSTANDARD LVCMOS33} [get_ports usb_oe_n]

set_property CLOCK_DEDICATED_ROUTE FALSE [get_nets usb_clk_60m]
connect_debug_port dbg_hub/clk [get_nets usb_clk_60m]

set_property PACKAGE_PIN T14 [get_ports {da_data_1[9]}] 
set_property PACKAGE_PIN T15 [get_ports {da_data_1[8]}] 
set_property PACKAGE_PIN Y17 [get_ports {da_data_1[7]}] 
set_property PACKAGE_PIN Y16 [get_ports {da_data_1[6]}] 
set_property PACKAGE_PIN T16 [get_ports {da_data_1[5]}] 
set_property PACKAGE_PIN U17 [get_ports {da_data_1[4]}] 
set_property PACKAGE_PIN V17 [get_ports {da_data_1[3]}] 
set_property PACKAGE_PIN V18 [get_ports {da_data_1[2]}] 
set_property PACKAGE_PIN T17 [get_ports {da_data_1[1]}] 
set_property PACKAGE_PIN R18 [get_ports {da_data_1[0]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[9]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[8]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[7]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[6]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[5]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[4]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[3]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[2]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[1]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_1[0]}] 
set_property IOSTANDARD LVCMOS33 [get_ports da_clk_1] 
set_property PACKAGE_PIN W16 [get_ports da_clk_1] 
 
set_property PACKAGE_PIN W18 [get_ports {da_data_2[9]}] 
set_property PACKAGE_PIN W19 [get_ports {da_data_2[8]}] 
set_property PACKAGE_PIN R16 [get_ports {da_data_2[7]}] 
set_property PACKAGE_PIN R17 [get_ports {da_data_2[6]}] 
set_property PACKAGE_PIN W20 [get_ports {da_data_2[5]}] 
set_property PACKAGE_PIN V20 [get_ports {da_data_2[4]}] 
set_property PACKAGE_PIN P18 [get_ports {da_data_2[3]}] 
set_property PACKAGE_PIN N17 [get_ports {da_data_2[2]}] 
set_property PACKAGE_PIN P19 [get_ports {da_data_2[1]}] 
set_property PACKAGE_PIN N18 [get_ports {da_data_2[0]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[9]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[8]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[7]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[6]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[5]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[4]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[3]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[2]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[1]}] 
set_property IOSTANDARD LVCMOS33 [get_ports {da_data_2[0]}] 
set_property IOSTANDARD LVCMOS33 [get_ports da_clk_2] 
set_property PACKAGE_PIN P16 [get_ports da_clk_2]